Multi-band radio signal transmitter/receiver

ABSTRACT

It is possible to achieve the miniaturization and the power saving of a hardware circuit as a multi-band radio signal transmitter/receiver, which can carry out a communication through a signal of a first communication method of transmitting and receiving a signal modulated by using information with regard only to a phase, for example, GSM/DCS, and a signal of a second communication method of transmitting and receiving a signal modulated by using an information of a phase and an amplitude, for example, UMTS (W-CDMA). A signal of PLL for a different reception channel is used as a local oscillation signal for a direct conversion reception, by using an image removing mixer or a reproduction dividing circuit, in each of GSM/DCS and UMTS modes, by switching a frequency of PLL in a transmitting IF signal in GSM/DCS/UMTS for each method, in order to generate a receiving signal used in GSM/DCS/UMTS.

TECHNICAL FIELD

The present invention relates to a multi-band radio signal electronictransmitter/receiver that can carry out a communication, for example,based on two kinds of different communication methods of a TDMA methodand a W-CDMA method and can carry out a communication of signals in twoor more frequency bands different from each other.

BACKGROUND ART

GSM is a portable telephone system in Europe, and DCS is a personalmobile communications system in Europe. Both of them use a TDMA (TimeDivision Multiple Access) system. Also, as a modulation method, they usea Gaussian filter for a transmission baseband filter and use GMSK(Gaussian-filtered Minimum Shift Keying) that is a narrow band MSK(Minimum Shift-Keying) in which a band is limited. However, each systememploys a different frequency band.

FIG. 1 shows a configuration of a conventional GSM terminal device 200.This GSM terminal device 200 processes a transmission/reception signalin a 900 MHz band. On the contrary, a device that processes atransmission reception signal in an 1800 MHz band is a DCS terminaldevice. Both of them have the substantially similar configurations.

At first, a transmitting system 200T of FIG. 1 is explained. Atransmission data generated in a data generating unit (not shown) issent to a baseband processing unit 201. The baseband processing unit 201performs a phase modulating process on the transmission data, generatesan I signal and a Q signal, which are orthogonal to each other, andsends to a quadrature modulation unit 202. In the quadrature modulationunit 202, the I signal and the Q signal, which are inputted thereto, aremixed with an intermediate frequency signal (hereafter, referred to asan IF signal) generated by a fixed PLL (Phase Locked Loop) circuit 203,respectively, and synthesized and then sent to an offset PLL circuitunit 204.

The offset PLL circuit unit 204 generates an RF signal (Radio Frequencysignal) in a 900 MHz band that is orthogonally modulated. At this time,the offset PLL circuit unit 204 is a frequency synthesizer for offsetPLL, and a signal is sent thereto from a channel PLL circuit unit 209for generating a receiving local oscillation signal, which will bedescribed later.

The RF signal generated by the offset PLL circuit unit 204 is amplifiedat a predetermined gain by a constant gain amplifier 205, and thenamplified by a power amplifier 206, and further radiated through anantenna switch 207 from an antenna 208 to air.

A receiving system 200R will be described below. The RF signaltransmitted from a base station is received through the antenna 208 andthe antenna switch 207, and sent to a band pass filter 211 and filtered.A filtering output of the band pass filter 211 is amplified by a lownoise amplifier 212, and then sent to a quadrature demodulation unit213.

The quadrature demodulation unit 213 demodulates the I signal and the Qsignal, which are the baseband signals, from the amplification outputfrom the low noise amplifier 212. At this time, the quadraturedemodulation unit 213 receives the receiving local oscillation signal,which is used for the demodulation, from the channel PLL circuit unit209.

Next, portions including the quadrature modulation unit 202, the fixedPLL circuit unit 203, the offset PLL circuit unit 204 and the channelPLL circuit unit 209 in FIG. 1 will be described in detail withreference to FIG. 2.

The fixed PLL circuit unit 203 includes a VCO (Voltage ControlledOscillator) 221, a fixed PLL controlling unit 222 and a low pass filter223, and generates an intermediate frequency signal of 760 MHz, andsends to a quadrature modulation unit 222.

The quadrature modulation unit includes a divider 224, mixers 225, 226and an adder 227. The divider 224 divides the intermediate frequencysignal of 760 MHz from the fixed PLL circuit unit 203 into halves, andmakes into intermediate frequency signals of 380 MHz of two phasesdifferent from each other by 90 degrees, and then sends to the mixer 225and the mixer 226.

The mixers 225 and 226 mix the I signal and the Q signal with theintermediate frequency signals of 380 MHz of the two phases whose phasesare different by 90 degrees, respectively. Then, in the quadraturemodulation unit 202, outputs of the mixers 225 and 226 are added by theadder 227 and sent to the offset PLL circuit unit 204.

The offset PLL circuit unit 204 includes a VCO 228, a mixer 229, a lowpass filter 230, a phase comparator 231 and a low pass filter 232. Also,the channel PLL circuit unit 209 includes a VCO 233, a channel PLL 234and a low pass filter 235.

The channel PLL circuit unit 209 generates a signal of a suitablefrequency at a time of transmission from the VCO 233 or at a time ofreception, in coincidence with a frequency of a channel used by the GSMterminal device 200. In the case of this example, at the time of thetransmission, it generates a transmission signal of 1260 to 1295 MHz,and sends to the offset PLL circuit unit 204. Also, at the time of thereception, it generates an oscillation frequency signal of 1387.5 to1440 MHz, which is outputted as a receiving local oscillation signalfrom an output terminal 236.

In the offset PLL circuit unit 204, at the time of the transmission, anoscillation output signal of the VCO 228 and a transmission frequencysignal for a channel to be used from the channel PLL circuit unit 209are mixed by the mixer 229, and its mixed output is sent through the lowpass filter 230 to the phase comparator 231. The phase comparator 231sends the phase comparison output between the output from the low passfilter 230 and the output from the quadrature modulation unit 202,through the low pass filter 232 to the VCO 228, and a frequency of anoutput oscillation signal from this VCO 228 is controlled.

Accordingly, an oscillation frequency of the VCO 228 is converged so asto be equal to a value obtained by the following calculation: (theoscillation frequency of the VCO 233)−{(the oscillation frequency of theVCO 221)/2}. The IF signal of 380 MHz from the quadrature modulationunit 202, which is inputted to the phase comparator 228, has the phaseinformation for the I signal and the Q signal. Thus, the output signalof the VCO 228 is also phase-modulated by the I signal and the Q signal.That is, as the output of the VCO 228, the transmission signal of theGSM is GMSK-modulated and directly obtained.

The circuit for the transmission signal generation using the offset PLLcircuit unit 204 as mentioned above can be attained by a fact that theGMSK modulation is the modulating method using the information of onlythe phase.

By the way, recently, a technique of CDMA (Code Division MultipleAccess) or W-CDMA (Wideband Code Division Multiple Access) being aleading system as a next generation of a mobile communication system hasbeen remarked. In this specification description, the communicationmethod employing the W-CDMA system and the like is assumed to be a UMTS(Universal Mobile Telecommunication System) system.

In the case of the UMTS (Universal Mobile Telecommunication System)system, as the modulating method, it does not use the modulating methodthrough the information of only the phase such as the GMSK, and it usesHPSK that is the modulating method using even information of anamplitude and the like.

From the background that there are the plurality of communicationmethods and the plurality of communication service frequency bands, asdescribed above, a multi-band radio signal transmitter/receiver has beendesired which can be used as a multi-band system based on two kinds ofcommunication methods including the function of the GSM terminal deviceand the function of the DCS terminal device as mentioned above and eventhe function of the W-CDMA terminal device.

However, the W-CDMA employs the modulating method such as HPSK and thelike. Thus, if a multi-band system terminal including therein theabove-mentioned GSM terminal device 200 is considered, the transmissionsignal orthogonally modulated by the above-mentioned offset PLL circuitunit 204 can not be generated. This is because the QPSK, the HPSK andthe like have the information of amplitude components. In the outputsignal of the VCO 228 of FIG. 2, it is evident that correspondingly toan output voltage level of the phase comparator 231, only its phasecomponent is changed, and the change in the amplitude is not induced atall.

FIG. 3 shows a circuit diagram of a PLL system added as the W-CDMAsystem of the UMTS system, in the case where the multi-band radio signaltransmitter/receiver is considered.

This PLL system circuit includes a quadrature modulation unit 240, achannel PLL circuit unit 241 that is a PLL synthesizer for generating anRF signal of a transmission frequency for this quadrature modulationunit 240 and a fixed PLL circuit unit 242, in a PLL configuration for atypical direct modulation.

Also, this PLL system circuit has: a mixer 243 for mixing a signal of atransmission frequency of a channel to be used from the channel PLLcircuit unit 241 and an output signal from the fixed PLL circuit unit242, and for generating a signal for a receiving local oscillationfrequency; and a band pass filter 244 for limiting a band of its mixedoutput and extracting and outputting the signal for the receiving localoscillation frequency.

The channel PLL circuit unit 241 includes a VCO 251, a channel PLLcontrolling unit 252 and a low pass filter 253, and generates an RFsignal of a transmission signal frequency fTX that is sent to thequadrature modulation unit 240.

The quadrature modulation unit 240 includes a mixer 254 and a mixer 255,an adder 256 and a π/2 phase shift circuit 257. The RF signal from thechannel PLL circuit unit 241 is phase-shifted by the π/2 phase shiftcircuit 257 and sent to the mixer 254, and the RF signal whose phase isnot shifted is sent to the mixer 255. Also, an I signal and a Q signalfrom a baseband processing unit 203 are inputted to the mixer 254 andthe mixer 255, and the above-mentioned RF signals are orthogonallymodulated. Respective outputs of the mixer 254 and the mixer 255 aresynthesized by the adder 256 and outputted as a transmission signal froman output terminal 258.

The fixed PLL circuit unit 242 includes a VCO 261, a fixed PLLcontrolling unit 262 and a low pass filter 263, generates a fixedfrequency signal fFIX, and sends to the mixer 243.

The mixer 243 mixes the above-mentioned fixed frequency signal fFIX withthe signal frequency fTX from the above-mentioned channel PLL circuitunit 241. Then, the band pass filter 244 extracts a frequency fL0(=fTX+fFIX) of a sum of an oscillation frequency of the VCO 251 and anoscillation frequency of the VCO 261. This is outputted as the receivinglocal oscillation frequency fL0 from the output terminal 245.

In a small portable wireless terminal, in order to miniaturize a circuitscale of a wireless unit, the employment of the above-mentioned directconversion (DCR) method contributes to the miniaturization and thelighter weight. Thus, if the DCR method is used in the portable terminalof the multi-band communication system that can correspond to differenttwo communication methods selected from systems such as GSM/DCS/UMTS andthe like and the different frequency bands, it can be expected tolargely contribute to the miniaturization and the lighter weight.

However, as mentioned above, in the multi-band radio signaltransmitter/receiver that corresponds to the WCDMA, system and theGSM/DCS system, namely, in the circuit in which the PLL system circuitin FIG. 2 and the PLL system circuit in FIG. 3 are combined, the PLLcircuit containing the VCO is doubled. Thus, its scale becomes enormousin designing the circuit and making into an IC.

The purpose of the present invention is to provide a multi-band radiosignal transmitter/receiver that can achieve a miniaturization of ahardware circuit and a saving of an electric power, in view of theabove-mentioned problems.

DISCLOSURE OF THE INVENTION

A multi-band radio signal transmitter/receiver according to the presentinvention is a multi-band radio signal transmitter/receiver, which cancarry out a communication through a signal of a first communicationmethod of transmitting and receiving a signal modulated by using aninformation of only a phase and through a signal of a secondcommunication method of transmitting and receiving a signal modulated byusing an information of a phase and an amplitude and can also carry outa communication in a plurality of different frequency bands, which ischaracterized by including:

-   -   first frequency signal generating means, which generates a        signal of a fixed frequency that is different between a case of        the above-mentioned first communication method and a case of the        above-mentioned second communication method;    -   second frequency signal generating means, which generates a        signal of a frequency corresponding to a communication channel        to be used, with regard to a communication method and a        frequency band that are selected from the above-mentioned first        communication method, the above-mentioned second communication        method and the above-mentioned plurality of frequency bands,        wherein the above-mentioned signal is a transmitting/receiving        reference oscillation signal that is used to generate a        receiving local oscillation signal for demodulating a reception        signal based on the above-mentioned first communication method        or a reception signal based on the above-mentioned second        communication method for each communication method and is also        used to generate a transmission signal based on the        above-mentioned first communication method or a transmission        signal based on the above-mentioned second communication method;    -   first communication method modulating means for generating a        modulation signal in which a transmitting baseband signal is        modulated by using a signal of a fixed frequency for the        above-mentioned first communication method from the        above-mentioned first frequency signal generating means, as a        modulating reference signal, when the transmission signal of the        above-mentioned first communication method is generated;    -   amplifying means for amplifying a signal of a fixed frequency        for the above-mentioned second communication method from the        above-mentioned first frequency signal generating means, when        the transmission signal of the above-mentioned second        communication method is generated; and    -   transmitting signal generating means for generating a modulating        reference signal, which when generating the transmission signal        of the above-mentioned first communication method,        phase-compares the above-mentioned modulation signal from the        above-mentioned first communication method modulating means with        the above-mentioned transmitting/receiving reference oscillation        signal from the above-mentioned second frequency signal        generating means, controls a variable frequency oscillator based        on its phase comparison output and thereby generates a        modulation transmission signal, and when generating the        transmission signal of the above-mentioned second communication        method, phase-compares the above-mentioned amplified signal of        the fixed frequency for the above-mentioned second communication        method from the above-mentioned amplifying unit with the        above-mentioned transmitting/receiving reference oscillation        signal from the above-mentioned second frequency signal        generating means, and based on its phase comparison output,        generates a modulation transmission signal of the        above-mentioned second communication method.

In the multi-band radio signal transmitter/receiver having theabove-mentioned configuration, in a case of a transmission of a radiosignal of the first communication method, the first communication methodmodulating means modulates the transmitting baseband signal based on thesignal of the fixed frequency for the first communication method fromthe first frequency signal generating means, and phase-compares itsmodulation signal with the transmitting/receiving reference oscillationsignal from the second frequency signal generating means, and thencontrols the variable frequency oscillator based on its phase comparisonoutput, and thereby generates the modulation transmission signal.

Also, in a case of a reception of a radio signal of the firstcommunication method, the demodulation can be carried out byorthogonally demodulating the reception signal, on the basis of thereceiving local oscillation signal generated in accordance with thetransmitting/receiving reference oscillation signal from the secondfrequency signal generating means.

Also, in a case of a transmission of a radio signal of the secondcommunication method, the amplifying unit amplifies the signal of thefixed frequency for the second communication method from the firstfrequency signal generating means. Then, the transmitting signalgenerating means phase-compares the amplified signal of the fixedfrequency for the second communication method from the amplifying means,and generates the modulating reference signal for generating themodulation transmission signal of the second communication method, basedon its phase comparison output.

Then, the transmitting baseband signal is modulated on the basis of themodulating reference signal, and the modulation transmission signal ofthe second communication method is generated.

In a case of a reception of a radio signal of the second communicationmethod, the demodulation can be carried out by orthogonally demodulatingthe reception signal, with the transmitting/receiving referenceoscillation signal from the second frequency signal generating means asthe receiving local oscillation signal.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram showing a configuration example of atransmitting/receiving terminal device for a GSM system,

FIG. 2 is a view explaining a PLL circuit system in FIG. 1,

FIG. 3 is a view explaining a PLL circuit system for W-CDMA,

FIG. 4 is a block diagram showing an entire configuration of anembodiment of a multi-band radio signal transmitter/receiver accordingto the present invention,

FIG. 5 is a view showing a specific configuration example of a frequencyswitching PLL circuit unit in FIG. 4,

FIG. 6 is a view showing a specific configuration example of a channelPLL circuit unit in FIG. 4,

FIG. 7 is a view showing a specific configuration example of a receivingsystem 10 in FIG. 4,

FIG. 8 is a view explaining a specific configuration example of an imageremoving mixer unit in FIG. 4,

FIG. 9 is a view showing a specific configuration example of atransmitting system 20 in FIG. 4,

FIG. 10 is a view explaining a specific configuration example of aquadrature modulation/amplifying unit 22 in FIG. 4,

FIG. 11 is a view explaining a conventional configuration example incomparison with an embodiment in the present invention,

FIG. 12 is a view explaining a configuration of a main portion of anembodiment in the present invention,

FIG. 13 is a block diagram showing an entire configuration of anotherembodiment in the present invention, and

FIG. 14 is a view showing a specific configuration example of areproduction dividing circuit unit in FIG. 13.

BEST MODE FOR CARRYING OUT INVENTION

An embodiment of a multi-band radio signal transmitter/receiveraccording to the present invention will be described below withreference to FIG. 4.

Entire Configuration of Multi-Band Radio Signal Transmitter/Receiver inFirst Embodiment

FIG. 4 is a block diagram showing the entire configuration example ofthe multi-band radio signal transmitter/receiver in this firstembodiment. The multi-band radio signal transmitter/receiver in thisembodiment has a receiving system 10, a transmitting system 20, afrequency switching PLL circuit unit 30, a channel PLL circuit unit 40and a controlling unit 50, and also has switching circuits 61, 62, 63and 64, which are switched on the basis of a communication method, aband and a transmission/reception which are to be used, and a duplexer65.

Here, the frequency switching PLL circuit unit 30 corresponds to firstfrequency signal generating means in Claim 1. Also, the channel PLLcircuit unit 40 corresponds to a second frequency signal generatingmeans in Claim 1.

The switching circuit 61 is a high frequency switch (antenna switch),which is switched between a case of GSM/DCS mode and a case of UMTS modeand switches between a transmission signal to an antenna 70 and areception signal. The switching circuit 62 is a high frequency switch(mode switching switch) switched between a case of GSM mode and a caseof DCS mode. The switching circuit 63 is a high frequency switch forswitching between the transmission signal and the reception signal inthe case of the GSM mode. Also, the switching circuit 64 is a highfrequency switch for switching between the transmission signal and thereception signal in the case of the DCS mode.

The receiving system 10 includes: a variable gain low noise amplifier11G and a quadrature demodulation unit 12G which are turned on by asupply of a power supply in the GSM mode; a variable gain low noiseamplifier 11D and a quadrature demodulation unit 12D which are turned onby a supply of a power supply at the DCS mode time; a variable gain lownoise amplifier 11W and a quadrature demodulation unit 12W which areturned on by a supply of a power supply at the UMTS (W-CDMA) mode time;and an image rejection mixer unit 13.

The image rejection mixer unit 13 generates a receiving localoscillation frequency signal in the GSM mode or a receiving localoscillation frequency signal in the DCS mode, from a signal from thechannel PLL circuit unit 40 and a signal from the frequency switchingPLL circuit unit 30, and sends the respective receiving localoscillation frequency signals to the quadrature demodulation unit 12G orthe quadrature demodulation unit 12D. In this case, as described later,the image rejection mixer unit 13 generates the receiving localoscillation frequency in the GSM mode and the receiving localoscillation frequency in the DCS mode, which are equal to the receptionsignal frequency in the GSM mode and the reception signal frequency inthe DCS mode, respectively.

The transmitting system 20 includes switching circuits 21I and 21Q, aquadrature modulation/amplifying unit 22, an offset PLL circuit unit 23,a quadrature modulation unit 24 for the UMTS mode, a band pass filter25G that is turned on by a supply of a power supply in the GSM mode, apower amplifier 26G and an isolator 27G, and a band pass filter 25D thatis turned on by a supply of a power supply in the DCS mode, a poweramplifier 26D and an isolator 27D, and a band pass filter 25W that isturned on by a supply of a power supply in the UMTS mode, a poweramplifier 26W and an isolator 27W.

The switching circuits 21I and 21Q are switched in accordance with aswitching control signal from the controlling unit 50 so as to send an Isignal a Q signal from a baseband circuit to the quadraturemodulation/amplifying unit 22 in the GSM/DCS mode, and send apredetermined direct current voltage VB1 (>0) and 0 volt, instead of theI signal and the Q signal, to the quadrature modulation/amplifying unit22, in the UMTS mode.

The quadrature modulation/amplifying unit 22 functions as the quadraturemodulation unit in the GSM/DCS mode, and functions as the amplifier inthe UMTS mode, in accordance with the switching through those switchingcircuits 21I and 21Q. The configurations of those switching circuits 21Iand 21Q and the quadrature modulation/amplifying unit 22 will bedescribed later in detail.

The offset PLL circuit unit 23 corresponds to transmitting signalgenerating means in Claim 1, and generates the signals of transmissionsignal frequencies in the respective modes, in the GSM/DCS mode, in thisembodiment, and generates a modulating reference signal sent to thequadrature modulation unit 24, at the UMTS mode time.

The quadrature modulation unit 24 is turned on when the power supply isturned on in the UMTS mode, and it orthogonally modulates the I signaland the Q signal from a baseband signal generating unit by using themodulating reference signal from the offset PLL circuit unit 23, andgenerates a signal of a transmission signal frequency.

By the way, although a control line is omitted, in the receiving system10 and the transmitting system 20, the supply control of the powersupply to the respective units based on the times of the respectivemodes is carried out in accordance with the control signal from thecontrolling unit 50. Also, the switching control of the switchingcircuits 21I and 21Q is carried out in accordance with the controlsignal from the controlling unit 50, based on the times of therespective modes.

The frequency switching PLL circuit unit 30 generates a signal of afixed frequency by using the PLL, from a frequency signal of a highaccuracy from a temperature compensated crystal oscillator 80(hereafter, referred to as TCXO). However, in this embodiment, thethus-generated fixed frequency is assumed to be the frequency differentbetween the cases of GSM/DCS mode and the UMTS mode. The switching ofthe frequency is carried out by the control signal from the controllingunit 50.

In this embodiment, the frequency switching PLL circuit unit 30generates a signal of a frequency of, for example, 380 MHz in theGSM/DCS mode, and generates a signal of a frequency of, for example, 415MHz in the DCS mode.

The channel PLL circuit unit 40 generates a transmitting/receivingreference signal for a channel to be used, from a reference frequencysignal from the TCXO 80, in accordance with the control signal from thecontrolling unit 50.

The controlling unit 50 generates the control signals based on the modeswitching operations of a user through an operation key input unit 51and other key operations. The control signals are sent to the respectiveunits, as mentioned above.

The further specific configuration example in the respective units inFIG. 4 will be described below. FIG. 5 shows the specific configurationexample of the frequency switching PLL circuit unit 30. In this example,the frequency switching PLL circuit unit 30 includes a VCO 31, afrequency switching PLL controlling unit 32, a loop filter 33 and a ½divider 34.

The frequency switching PLL controlling unit 32 phase-compares anoscillation output signal of the VCO 31 or a signal, in which it isdivided, with a signal in which an oscillation output signal of the TCXO80 is divided, and sends its phase comparison error output through theloop filter 33 to the VCO 31. Due to this loop control, the VCO 31generates a signal of a fixed frequency that is synchronous in phasewith the reference frequency signal from the TCXO 80.

At this time, due to the control signal from the controlling unit 50, adivision ratio in the frequency switching PLL controlling circuit 32 iscontrolled so as to be switched between the GSM/DCS mode and the UMTSmode. Thus, the VCO 31 is controlled so as to output a signal of afrequency of, for example, 760 MHz in the GSM/DCS mode, and output asignal of a frequency of, for example, 830 MHz in the UMTS mode.

Then, frequency signals, in which a frequency signal from the VCO 31 isdivided into half frequencies by the ½ divider 34, become outputs ofthis frequency switching PLL circuit unit 30. In this case, thefrequency signals, in which frequencies are equal and phases aredifferent from each other by 90 degrees, from the ½ divider 34, are sentto the image rejection mixer unit 13 from this frequency switching PLLcircuit unit 30. Also, the frequency signal of one phase is sent to thequadrature modulation/amplifying unit 22.

FIG. 6 shows the specific configuration example of the channel PLLcircuit unit 40. In this example, the channel PLL circuit unit 40includes a VCO 41 for the GSM/DCS mode, a VCO 42 for the UMTS mode time,a channel PLL controlling unit 43 and a loop filter 44.

The VCO 41 for the GSM/DCS mode can be operated only at the GSM/DCSmode, in accordance with the control signal from the controlling unit50, although the illustration is omitted. Also, the VCO 42 for the UMTSmode can be operated only at the UMTS mode.

Then, the channel PLL controlling unit 43 phase-compares an oscillationoutput signal of the VCO 41 or the VCO 42 or a signal in which it isdivided, with a signal in which the oscillation output signal of theTCXO 80 is divided, and sends its phase comparison error output throughthe loop filter 44 to the VCO 41 or the VCO 42. Due to this loopcontrol, the VCO 41 or the VCO 42 generates a signal of a frequency fora channel that is synchronous in phase with the reference frequencysignal from the TCXO 80 and specified by the control signal from thecontrolling unit 50. At this time, due to the control signal from thecontrolling unit 50, a division ratio in the channel PLL controllingcircuit 43 is switch-controlled such that the VCO 41 or the VCO 42outputs the signal of the frequency corresponding to the channel to beused.

In this case, the VCO 41 for the GSM/DCS mode, in accordance with thecontrol signal from the controlling unit 50, generates the frequencysignals in the range represented by:

-   In Transmission Mode of GSM Mode; 1295 MHz to 1330 MHz-   In Reception Mode of GSM Mode; 1340 MHz to 1375 MHz-   In Transmission Mode of DCS Mode; 1295 MHz to 1370 MHz-   In Reception Mode of DCS Mode; 1390 MHz to 1465 MHz

By the way, this embodiment is as follows:

-   Transmission Signal Frequency of GSM Mode;    -   880 MHz to 915 MHz-   Reception Signal Frequency of GSM Mode;    -   925 MHz to 960 MHz-   Transmission Signal Frequency of DCS Mode;    -   1710 MHz to 1785 MHz-   Reception Signal Frequency of DCS Mode;    -   1805 MHz to 1880 MHz        They are designed so as to be different by 45 MHz and 95 MHz        from the transmission signal frequency and the reception signal        frequency of each channel in the respective modes and designed        so as to be different by 415 MHz from the oscillation        frequencies for the channels at the respective modes in the VCO        41 for the GSM/DCS mode.

Also, the VCO 42 for the UMTS mode generates the frequency signal in therange between 2110 MHz and 2170 MHz, in accordance with the controlsignal from the controlling unit 50. In the case of this example, theoscillation frequency of the VCO 42 for the UMTS mode is equal to thereception signal frequency of the UMTS mode.

By the way, the transmission signal frequency of the UMTS mode isdesigned so as to be between 1920 MHz and 1980 MHz, and it is designedso as to be different by 190 MHz from the oscillation frequency of theVCO 42 for the UMTS mode.

Next, FIG. 7 shows the specific configuration example of the receivingsystem 10. That is, in the receiving system 10 of this example, thereception signal in the GSM mode from the variable gain low noiseamplifier 11G is sent to frequency mixers 101 and 102, and the receptionsignal in the DCS mode from the variable gain low noise amplifier 11D issent to frequency mixers 111 and 112, and the reception signal in theUMTS mode time from the variable gain low noise amplifier 11W is sent tofrequency mixers 121 and 122.

Also, in the GSM mode, the receiving local oscillation frequency signal(a frequency equal to a reception signal frequency) for the GSM mode isobtained from the image rejection mixer unit 13. It is sent to thefrequency mixers 101 and 102 through a poly-phase filter 103 having afunction of generating local oscillation signals of phases orthogonal toeach other.

Thus, the I signal and the Q signal in the GSM mode are demodulated andobtained from the frequency mixers 101 and 102. The I signal and the Qsignal are sent through variable gain amplifiers 104, 105, respectively,and further through low pass filters 106 and 107, respectively, to abaseband processing unit (not shown).

Also, in the DCS mode, the receiving local oscillation frequency signal(a frequency equal to a reception signal frequency) for the DCS mode isobtained from the image rejection mixer unit 13. It is sent to thefrequency mixers 111 and 112 through a poly-phase filter 113 having afunction of generating local oscillation signals of phases orthogonal toeach other.

Thus, the I signal and the Q signal in the DCS mode are demodulated andobtained from the frequency mixers 111 and 112. The I signal and the Qsignal are sent through the variable gain amplifiers 104, 105,respectively, and further through the low pass filters 106 and 107,respectively, to the baseband processing unit (not shown).

On the other hand, the local oscillation frequency signal of thefrequency equal to the reception signal frequency is obtained from thechannel PLL circuit unit 40, at the time of the UMTS mode, as mentionedabove. So, the frequency signal from this channel PLL circuit unit 40 issent to the frequency mixers 121 and 122 through a poly-phase filter 123having a function of generating local oscillation signals of phasesorthogonal to each other.

Thus, at the time of the UMTS mode, the I signal and the Q signal aredemodulated and obtained from the frequency mixers 121 and 122. The Isignal and the Q signal are sent through low pass filters 124 and 125,respectively, and further through variable gain amplifiers 126, 127,respectively, to a baseband processing unit (not shown).

Moreover, in this example, output signals of the variable gainamplifiers 126 and 127 are fed back to the output sides of the frequencymixers 121 and 122 through direct current amplifiers (DC amplifiers) 128and 129 to thereby suppress the direct current offset componentsgenerated in the baseband signals of the I signal and the Q signalthrough direct conversion (DCR).

By the way, in a digital modulating method of a narrow band used in theGSM and the DCS, at the time of the output of the direct current offsetcomponents generated through the DCR in the demodulator output, inshort, the baseband signal, the circuit for the direct current offsetsuppression through the direct current feed-back can not be used. Thisis because when this circuit is used, a low region of the frequency iscut away, which results in the loss of a part of demodulation signaldata.

On the other hand, in the W-CDMA signal of the UMTS system, its band is2 MHz and is sufficiently wide as compared with the GSM/DCS system.Thus, even if the direct current feedback causes the low band frequencyto be removed, the information contained in the signal is not severelylost.

Usually, a cutoff frequency of the low band is about 2 kHz. However, ifa low band frequency such as 2 kHz is lost in the GSM/DCS, the normalreception becomes impossible. This fact indicates that although in theW-CDMA system, the direct current offset cancel can be attained by usingthe relatively simple circuit as shown in FIG. 7, it is difficult in thecase of the GSM/DCS.

In this way, in the UMTS mode, without any usage of the offset frequencyto reduce the direct current offset such as the GSM/DCS mode, theoscillation frequency of the VCO 42 in the channel. PLL circuit unit 40can be oscillated at a frequency (2110 to 2170 MHz) equal to a frequencyof a reception RF signal.

FIG. 8 is a view explaining the configuration example of the imagerejection mixer unit 13. As mentioned above, the image rejection mixerunit 13 generates the receiving local oscillation frequency signal equalto the reception signal frequency, from the frequency signal from thechannel PLL circuit unit 40 in the GSM/DCS mode and the frequency signalfrom the frequency switching PLL circuit unit 30.

As shown in FIG. 8, at the time of the GSM/DCS mode, the output signalof the VCO 41 of the channel PLL circuit unit 40 is sent to poly-phasefilters 131 and 132 each having a function of generating signals ofphases orthogonal to each other. Then, the phase signals (the 0°-phasesignals) from the one of the poly-phase filters 131 and 132 are addedthrough buffer amplifiers 133 and 135 and sent to a frequency mixer 137,and the phase signals (the 90°-phase signals) from the other of thepoly-phase filters 131 and 132 are added through buffer amplifies 134and 136 and sent to a frequency mixer 138.

Then, a frequency signal of a 0°-phase from the divider 34 of thefrequency switching PLL circuit unit 30 is sent to the frequency mixer137, and a frequency signal of a 90°-phase from the divider 34 is sentto the frequency mixer 138. Then, the mixed outputs of the frequencymixers 137 and 138 are sent to an adder 139 and added. Its added outputis sent through a high frequency amplifier 140 to the quadraturedemodulation units 12G and 12D.

The specific configuration example of the transmitting system 20 will bedescribed below. FIG. 9 is a view showing the configuration example ofthe transmitting system 20 in this example.

The quadrature modulation/amplifying unit 22 includes frequency mixers151 and 152, a divider 153, an adder 154, a low pass filter 155 and ahigh frequency amplifier 156. Then, each of the signals from theswitching circuits 21I and 21Q serves as one input to each of thefrequency mixers 151 and 152. Also, the frequency signal from thefrequency switching PLL circuit unit 30 is divided into halves by thedivider 153, and separated into signals of two phases orthogonal to eachother. Then, a division output signal of a 0°-phase is sent to thefrequency mixer 151, and a division output signal of a 90°-phase is sentto the frequency mixer 152.

Then, the output signals of the frequency mixers 151 and 152 are addedby the adder 154. Its added output is sent through the low pass filter155 and the high frequency amplifier 156 to the offset PLL circuit unit23.

The I signal and the Q signal from the base band processing circuit (notshown) are sent through low pass filters 141 and 142 to the one inputterminals of the switching circuits 21I and 21Q. The predetermineddirect current voltage VB1 is applied to the other input terminal of theswitching circuit 21I. Also, 0 volt is applied to the other inputterminal of the switching circuit 21Q.

Those switching circuits 21I and 21Q are switched by the control signalfrom the controlling unit 50. At the time of the GSM/DCS mode, theyoutput the I signal and the Q signal sent to the one input terminals tothe quadrature modulation/amplifying unit 22, and at the time of theUMTS mode, they output the direct current voltage VB1 and 0 volt sent tothe other input terminals to the quadrature modulation/amplifying unit22. In accordance with the input switching caused by the switchingbetween those switching circuits 21I and 21Q, the quadraturemodulation/amplifying unit 22 functions as the quadrature modulationunit at the GSM/DCS mode, and functions as the amplifier of thefrequency signal from the frequency switching PLL circuit unit 30, atthe UMTS mode.

The frequency mixers 151 and 152 in the quadrature modulation/amplifyingunit 22 are configured by using a double balanced type mixer referred toas a Gilbert cell mixer. FIG. 10(A) shows a circuit example of theGilbert cell mixer. In this example, two mixer circuits of FIG. 10(A)are used to configure the frequency mixers 151 and 152.

The Gilbert cell mixer is provided with transistors TR1, TR2, TR3, TR4,TR5 and TR6, resistors R1, R2, R5, R6 and R7, and-current sources I1 andI2, as shown in FIG. 10(A).

Then, in the Gilbert cell mixer, usually, a high frequency signal RF isinputted between input terminals 1511 and 1512, and a local oscillationsignal LOCAL is sent between input terminals 1513 and 1514. Then, asignal IFOUT after a frequency conversion is outputted between outputterminals 1515 and 1516.

In this embodiment, the frequency signal from the frequency switchingPLL circuit unit 30 is sent to each of the input terminals 1511 and 1512of the two frequency mixers 151, 152. Also, the signals from theswitching circuits 21I and 21Q are sent between the input terminals 1513and 1514 of the two frequency mixers 151, 152.

Thus, in the GSM/DCS mode, the switching circuits 21I and 21Q become ata condition at which they send the I signal and the Q signal from thebaseband signal generating circuit to the quadraturemodulation/amplifying unit 22. Hence, in each of the two frequencymixers 151, 152, the I signal and the Q signal are frequency-mixed withthe frequency signal from the frequency switching PLL circuit unit 30.That is, the quadrature modulation/amplifying unit 22 serves as thequadrature modulation unit.

At this time, as for the signal IFOUT after the frequency conversionobtained between the respective output terminals 1515 and 1516 of thetwo frequency mixers 151, 152, the signal in which the I signal or the Qsignal with a predetermined direct current potential, for example, adirect current potential VB1 as a center is superposed on the signal of415 MHz from the divider 153 is obtained.

On the other hand, in the UMTS mode, the switching circuits 21I and 21Qbecome at a condition at which they send the direct current voltage VB1and 0 volt to the quadrature modulation/amplifying unit 22. The basebandsignals of the I signal and the Q signal are not sent to the quadraturemodulation/amplifying unit 22.

That is, only the proper direct current voltage is applied between theinput terminals 1511 and 1512 of the frequency mixer 151 in FIG. 9. Forexample, the direct current voltage VB1 is applied to the input terminal1513 on the side connected to bases of the transistor TR3 and thetransistor TR6, and 0 V is applied to the input terminal 1514 on theside connected to bases of the transistor TR4 and the transistor TR5.Then, the base currents of the transistor TR4 and the transistor TR5 donot flow. Thus, those transistors are turned off.

As a result, the circuit of FIG. 10(A) becomes substantially equivalentto a circuit of FIG. 10(B). This becomes a cascode amplifier in which agrounded-base amplifier composed of the transistor TR3 and thetransistor TR6 is cascode-connected to a grounded-emitter amplifier ofdifferential inputs composed of the transistor TR1 and the transistorTR2. The operation of the circuit is changed from the mixer to theamplifier.

On the other hand, 0 volt is applied between the input terminals 1511and 1512 of the frequency mixer 152. Thus, all of the transistors TR3 toTR6 are turned off. Hence, this frequency mixer 152 is not operated.

By the way, in FIG. 4 and FIG. 9, for the sake of the easy understandingof the explanation, the switching circuits 21I and 21Q are installed soas to switch the circuit unit 22 between the quadrature modulation unitand the amplifier. Specifically, the above-mentioned switching can beattained by switching the output of the baseband processing circuit (notshown) to the I signal and the Q signal in the GSM/DCS mode and to thedirect current voltage VB1 and 0 volt in the UMTS mode.

Next, the offset PLL circuit unit 23 includes a VCO 161G for the GSM, aVCO 161D for the DCS, a VCO 161W for the UMTS, a frequency mixer 162, alow pass filter 163, a frequency divider 164, a phase comparator 165 andloop filters 166G, 166D and 166W.

In this example, the VCO 161G for the GSM is arranged to oscillate in afrequency range between 880 MHz and 915 MHz.

The VCO 161D for the DCS is arranged to oscillate in a frequency rangebetween 1710 MHz and 1785 MHz.

And, the VCO 161W for the UMTS is arranged to oscillate in a frequencyrange between 1920 MHz and 1980 MHz.

For this reason, the output signals of the VCOs 161G, 161D and 161W aresent to the frequency mixer 162, and are mixed with the frequency signalfrom the channel PLL circuit unit 40. Then, its mixed output is sentthrough the low pass filter 163, to the frequency divider 164.

In this example, this frequency divider 164 serves as the ½ divider inthe GSM/DCS mode. In the UMTS mode, this frequency divider is passedthrough. The switching of this frequency divider 164 is carried out bythe control signal from the controlling unit 50.

An output signal of this frequency divider 164 is sent to the phasecomparator 165. The signal from the quadrature modulation/amplifyingunit 22 is sent to this phase comparator 165, and both of them arephase-compared. Then, its phase comparison output controls theoscillation frequency of the VCO 161G, 161D or 161W through the loopfilter 166G, 166D or 166W.

That is, the offset PLL circuit unit 23 generates the signal of thefrequency that is the sum or the difference between the frequency signalfrom the frequency switching PLL circuit unit 30 and the frequencysignal from the channel PLL circuit unit 40, in each mode of theGSM/DCS/UMTS.

Then, in the GSM/DCS mode, as mentioned above, the baseband issuperposed on the signal from the quadrature modulation/amplifying unit22. Thus, the output signal of this offset PLL circuit unit 23 is thesignal of the transmission frequency in which the baseband signal issuperposed on the frequency signal of the difference between thefrequency signal from the frequency switching PLL circuit unit 30 andthe frequency signal from the channel PLL circuit unit 40. This isoutputted as the transmission signal through the band pass filter 25G or25D and the power amplifier 26G or 26D.

Also, in the UMTS mode, as mentioned above, the signal from thequadrature modulation/amplifying unit 22 is the signal in which thefrequency signal from the frequency switching PLL circuit unit 30 isamplified. Thus, the output signal of this offset PLL circuit unit 23becomes the frequency signal of the sum of the frequency signal from thefrequency switching PLL circuit unit 30 and the frequency signal fromthe channel PLL circuit unit 40. This frequency signal is sent as itsmodulating reference signal to the quadrature modulation unit 24 for theUMTS.

The quadrature modulation unit 24 includes low pass filters 171 and 172,frequency mixers 173 and 174, a variable gain amplifier 175, apoly-phase filter 176, an adder 177 and a variable gain amplifier 178.

Then, the frequency signal from the offset PLL circuit unit 23 is sentthrough the variable gain amplifier 175 to the poly-phase filter 176.The signals of phases orthogonal to each other from this poly-phasefilter 176 are sent to the frequency mixers 173 and 174, respectively.Also, the I signal and the Q signal from the baseband processing circuitare sent through the low pass filters 171 and 172 to those frequencymixers 173 and 174. Then, output signals of those frequency mixers 173and 174 are added by the adder 177, and its added output is sent throughthe variable gain amplifier 178 to the band pass filter 25W. The outputof the adder 177 is the transmission frequency signal of the UMTS mode.

The operation of the multi-band radio signal transmitter/receiver havingthe above-mentioned configuration will be described below.

[Operational Explanation of Receiving System]

The reception high frequency signal is inputted through the antenna 70to the high frequency switching circuit 61. Here, the switching circuit61 is switched by the control signal from the controlling unit 50,depending on whether the receiving device is at the GSM/DCS or UMTS(W-CDMA) mode of the system, and switches the path of the signal. Whenthe receiving device is at the GSM or DCS mode, the reception signal isfed to the high frequency switching circuit 62. When it is in the UMTSmode, the reception signal is fed to the duplexer 65.

The reception signal at the time of the GSM/DCS mode is furtherseparated into a GSM path and a DCS path, by the control signal from thecontrolling unit 50, depending on whether the receiving device is in theGSM mode or in the DCS mode, in the switching circuit 62. In short, thereception high frequency signal is fed from the switching circuit 62 tothe high frequency switching circuit 63 at the time of the GSM mode, andfed to the high frequency switching circuit 64 at the time of the DCSmode.

The high frequency switching circuits 63, 64 are designed such that thepaths are switched in the transmission and the reception. In a period ofa reception slot, the reception high frequency signal is fed from thehigh frequency switching circuit 63 or 64 to the variable gain low noiseamplifier 11G or 11D. Also, in a transmission slot period, the output ofthe power amplifier 26G or 26D sent through the isolator 27G or 27D isfed from the high frequency switching circuit 63 or 64 to the highfrequency switching circuit 62, in the direction opposite to thereception.

Then, in the GSM mode, the reception signal is amplified by the variablegain low noise amplifier 11G, as shown in FIG. 7, and then inputted tothe frequency mixers 101 and 102 of the quadrature modulation unit 12G,and multiplied by the local oscillation frequency from the imagerejection mixer unit 13 through the poly-phase filter 103. As mentionedabove, the local oscillation frequency from the image rejection mixerunit 13 is made equal to the reception signal frequency. Consequently,the direct conversion is attained.

In this way, in the outputs of the frequency mixers 101 and 102,quadrature baseband signals of the I signal and the Q signal areobtained. Those baseband signals are passed through the variable gainamplifiers 104 and 105 and the low pass filters 106 and 107. Thus, afterthe removal of interference signals in bands except the frequency to beused such as an adjacent channel and the like, they are passed to adigitally processing circuit of a baseband (not shown).

The variable gain low noise amplifier 11G and the variable gainamplifiers 104 and 105 can always keep an input dynamic range of an A/Dconverter constant by carrying out a control so that an amplitude of anA/D converter input signal is constant, for the sake of the digitalprocess.

In the DCS mode, the paths for the variable gain low noise amplifier 11Dand the quadrature demodulation unit 12D are used, and the processessimilar to those in the above-mentioned GSM mode are carried out.

On the other hand, in the UMTS mode, the reception high frequency signalis separated from the transmission signal by the duplexer 65, and fed tothe variable gain low noise amplifier 11W. At the same time, acontinuous transmission signal is fed in the direction of the highfrequency switch 61 through the duplexer 65.

Such as the system of the GSM/DCS, the employment of the duplexer 65without any usage of the high frequency switching circuit is inevitablefrom a fact that the W-CDMA is a continuous transmitting/receivingsystem.

The reception high frequency signal is amplified by the variable gainlow noise amplifier 11W, as shown in FIG. 7, similarly to the GSM/DCSmode, and fed to the quadrature demodulation unit 12W composed of thefrequency mixers 121 and 122 and the poly-phase filter 123. As a result,in the outputs of the frequency mixers 121 and 122, the I signal and theQ signal are respectively obtained.

Those I signal and Q signal are further passed through the low passfilters 124 and 125 and controlled to constant amplitudes by thevariable gain amplifiers 126 and 127, and then sent to the basebandprocessing units at that later stage.

Here, the difference from the receiving system of the GSM/DCS mode is afact that the direct current feedbacks through the direct currentamplifiers 128 and 129 are carried out from the outputs of the circuitcomposed of the low pass filters 124, 125 and the variable gainamplifiers 126, 127.

As mentioned above, in the W-CDMA signal, its band is 2 MHz and issufficiently wide as compared with the signal of the GSM/DCS. Thus, evenif the direct current feed-back causes the low band frequency to beremoved, even the simple circuit shown in FIG. 7 can effectively reducethe direct current offset, without any severe loss of the informationcontained in the signal.

[Explanation of Operation in Transmitting System]

The operation of the transmitting system 20 will be described belowalong the flow of the signal. At first, the operation at the time of theGSM mode or the DCS mode is explained.

At the time of the GSM mode or the DCS mode, as mentioned above, thequadrature modulation/amplifying unit 22 is designed so as to beoperated as the quadrature modulation unit. Also, the VCO 31 of thechannel switching PLL circuit unit 30 is controlled such that theoscillation frequency is 830 MHz.

At this time, as shown in FIG. 9, the I signal and the Q signal are fedfrom the baseband processing circuit through the low pass filters 141and 142 to the quadrature modulation/amplifying unit 22 composed of thefrequency mixers 151 and 152 and the frequency divider 153.

Here, the signal in which the signal of the frequency of 830 MHz fromthe VCO 31 of the frequency switching PLL circuit unit 30 is divided bythe frequency divider 34 is inputted to the frequency divider 153. Thus,in its outputs, two signals having a frequency of 207.5 MHz orthogonalto each other are obtained. As a result, in the outputs of thequadrature modulation units 151 and, 152, the IF signals (intermediatefrequency signals) of 207.5 MHz orthogonally modulated by the basebandsignals I and Q are obtained. Those IF signals are passed through thelow pass filter 155 and the high frequency amplifier 156 to the phasecomparator 165 of the offset PLL circuit unit 23.

Then, in the offset PLL circuit unit 23, at the time of the GSM mode,the VCO 161G for the GSM mode is turned on, and the other VCOs 161D,161W are turned off. Also, at the DCS mode time, the VCO 161D for theDCS mode is turned on, and the other VCOs 161G, 161W are turned off. Theoutput of the VCO 161G or the VCO 161D at the on-state is multiplied bythe signal from the VCO 41 for the GSM/DCS (refer to FIG. 6) of thechannel PLL circuit unit 40, by the frequency mixer 162.

When the oscillation frequency of the VCO 41 at the time of the GSM modeis assumed to be f_(CH) _(—) _(TX) _(—) _(GSW) and that at the time-ofthe DCS mode is assumed to be f_(CH) _(—) _(TX) _(—) _(DCS), theoscillation frequency of the VCO 41 is controlled in the channel PLLcircuit unit 40 so that as mentioned above, their oscillation arerepresented as follows.f _(CH) _(—) _(TX) _(—) _(GSW)=1295 to 1330 MHzf _(CH) _(—) _(TX) _(—) _(DCS)=1295 to 1370 MHz   (1)

Thus, in the output of the frequency mixer 162, the frequencies of thesum and the difference between the oscillation frequency of the VCO 41and an oscillation frequency f_(TX) _(—) _(GSM) of the VCO 161G or anoscillation frequency f_(TX) _(—) _(DCS) of the VCO 161D are obtained.That is, the signals having the following frequencies are fed to the lowpass filter 163.f_(CH) _(—) _(TX) _(—) _(GSM)±f_(TX) _(—) _(GSM)andf_(TX) _(—) _(DCS)±f_(CH) _(—) _(TX) _(—) _(DCS)   (2)

If the cutoff frequency of the low pass filter 163 is properly selected,the higher frequency of the above-mentioned two frequencies is removed.Then, only the following frequencies (415 MHz) are passed to thefrequency divider 164.f_(CH) _(—) _(TX) _(—) _(GSM)−f_(TX) _(—) _(GSM)andf_(TX) _(—) _(DCS)−f_(CH) _(—) _(TX) _(—) _(DCS)   (3)

In the frequency divider 164, as mentioned above, at the time of theGSM/DCS mode, the signal from the low pass filter 163 is halved to 207.5MHz and inputted to the phase comparator 165. The signal of theabove-mentioned IF frequency 207.5 MHz from the quadraturemodulation/demodulating unit 22 is sent to the phase comparator 165.Thus, the phase comparator 165 compares both of the signals. Then, itsphase error is outputted to the loop filter 166G or 166D.

The loop filters 166G, 166D integrate the phase error components,convert into a direct current voltage and apply that direct currentvoltage to control terminals of the VCOs 161G, 161D. The thus formedloop is converged such that the two input signal frequencies of thephase comparator 165 are equal. After all, they are represented asfollows.f _(CH) _(—) _(TX) _(—) _(GSM) −f _(TX) _(—) _(GSM)=415 MHzandf _(TX) _(—) _(DCS) −f _(CH) _(—) _(TX) _(—) _(DSC)=415 MHz   (4)

When the (1) is substituted in the equation (4), they are represented asfollows. $\begin{matrix}{\begin{matrix}{f_{TX\_ GSM} = {f_{{CH\_ TX}{\_ GSM}} - {415\quad{MHz}}}} \\{= {880\quad{to}\quad 915\quad{MHz}}}\end{matrix}{and}\begin{matrix}{f_{TX\_ DCS} = {f_{{CH\_ TX}{\_ DCS}} + {415\quad{MHz}}}} \\{= {1710\quad{to}\quad 1785\quad{MHz}}}\end{matrix}} & (5)\end{matrix}$Then, the oscillation frequencies of the VCOs 161G, 161D become equal tothe transmission frequencies of the GSM mode and the DCS mode.

By the way, the loop filters 166G, 166D are designed so as to have thecutoff frequency sufficiently higher than a modulation rate, so as toenable the GMSK modulation used in the GSM/DCS.

On the other hand, even at the UMTS mode, the operation similar to thatin the above-mentioned GSM/DCS mode is carried out. Here, in the channelPLL circuit unit 40, the system is different. Thus, the VCO 42 is turnedon and used. The operation in the UMTS mode will be described below.

At the time of the UMTS mode, as mentioned above, the quadraturemodulation/amplifying unit 22 is operated as the amplifier. Also, theVCO 31 of the frequency switching PLL circuit unit 30 is controlled suchthat the oscillation frequency is 760 MHz.

Then, from the frequency switching PLL circuit unit 30, the signal inwhich the output signal of 760 MHz of the VCO 31 is divided into halvesby the frequency divider 34 is sent to the frequency divider 153. It isfurther divided into halves by this frequency divider 153. Thus, thesignal of 190 MHz is fed to the phase comparator 165 through thequadrature modulation/amplifying unit 22 as the amplifier.

Differently from the GSM/DCS mode, the signal of 190 MHz at this UMTSmode is a non-modulation signal. In the offset PLL circuit unit 23, atthe UMTS mode time, the VCO 161W for the UMTS is on, and the other VCOs161G, 161D are off. Then, the output of this VCO 161W, which is at theon-state, is multiplied by the signal from the VCO 41 for the GSM/DCS inthe channel PLL circuit unit 40 (refer to FIG. 6) by the frequency mixer162.

When the oscillation frequency of the VCO 42 at the time of the UMTSmode is assumed to be f_(CH) _(—) _(TX) _(—) _(UMTS), the oscillationfrequency of the VCO 42 is controlled in the channel PLL circuit unit 40so that as mentioned above, it is represented as follows.f _(CH) _(—) _(TX) _(—) _(UMTS)=2110 to 2170 MHz   (6)

Thus, in the output of the frequency mixer 162, the frequencies of thesum and the difference between the oscillation frequency of the VCO 42and an oscillation frequency f_(TX) _(—) _(UMTS) of the VCO 161W areobtained. That is, the signals having the following frequencies are fedto the low pass filter 163.f_(CH) _(—) _(TX) _(—) _(UMTS)+f_(TX) _(—) _(UMTS)   (7)

If the cutoff frequency of the low pass filter 163 is properly selected,the higher frequency of the above-mentioned two frequencies is removed.Then, only the following frequency (190 MHz) is obtained.f_(CH) _(—) _(TX) _(—) _(UMTS)−f_(TX) _(—) _(UMTS)   (8)

This signal is fed to the frequency divider 164. However, at the UMTSmode time it is inputted through this divider 164 to the phasecomparator 165. Thus, the phase comparator 165 is compared with 190 MHzof the IF frequency from the above-mentioned quadraturemodulation/amplifying unit 22, and its phase error is outputted to theloop filter 166W.

The loop filter 166W integrates the phase error components, convertsinto a direct current voltage and applies that direct current voltage toa control terminal of the VCO 161W. The thus-formed loop is convergedsuch that the two input signal frequencies of the phase comparator 165are equal. After all, it is represented as follows.f _(CH) _(—) _(TX) _(—) _(GSM) −f _(TX) _(—) _(GSM)=190 MHz   (9)

When the equation (6) is substituted in the equation (9), it isrepresented as follows. $\begin{matrix}\begin{matrix}{f_{TX\_ UMTS} = {f_{{CH\_ TX}{\_ UMTS}} - {190\quad{MHz}}}} \\{= {1920\quad{to}\quad 1980\quad{MHz}}}\end{matrix} & (10)\end{matrix}$Then, the oscillation frequency of the VCO 161W becomes equal to thetransmission frequency at the time of the UMTS mode.

Then, the oscillation frequency signal of this VCO 161W is sent to thequadrature modulation unit 24, and frequency-mixed with the I signal andthe Q signal from the baseband processing unit (not shown), and amodulation transmission signal is generated. Then, that modulationtransmission signal is fed through the band pass filter 25W and thepower amplifier 26W to the antenna 70.

[Generation of Receiving Local Oscillation Frequency Signal]

The generation of the receiving local oscillation frequency signal willbe described below.

At first, as mentioned above, in the UMTS mode, namely, in the W-CDMA,the direct current offset compensating circuit can be attained by ananalog circuit. Thus, even if the local oscillation frequency is leakedto the input side of the variable gain low noise amplifier 11W, forexample, to the transmission line connected from the duplexer 65, thedirect current offset can be removed by the compensating circuitcomposed of the direct current amplifiers 128, 129. Hence, theoscillation frequency of the VCO 42 in the channel PLL circuit unit 40need not be set to a frequency different from the reception highfrequency signal. So, as represented by the above-mentioned (6)equation, the oscillation frequency of the VCO 42 can be made equal tothe reception frequency in the UMTS band.

On the other hand, at the time of the GSM/DCS mode, it is necessary toreduce as much as possible the direct current offset. Thus, theoscillation frequency of the VCO 41 in the channel PLL circuit unit 40must be oscillated at a frequency different from the receptionfrequency.

Now, the oscillation frequencies of the VCO 41 in the reception slot areassumed to be as follows.f _(CH) _(—) _(RX) _(—) _(GSM)=1340 to 1375 MHzf _(CH) _(—) _(RX) _(—) _(DCS)=1390 to 1465 MHz   (11)This signal is decomposed into two signals orthogonal to each other bythe poly-phase filters 131, 132 in the image rejection mixer unit 13,and inputted through the buffer amplifiers 133 to 136 to the frequencymixers 137 and 138, respectively.

On the other hand, the signal of 830 MHz from the VCO 31 in thefrequency switching PLL circuit unit 30 is halved by the frequencydivider 34, which results in the signals whose frequencies are 415 MHzand whose phases are orthogonal to each other. Then, the frequencysignals of 415 MHz whose phases are orthogonal to each other are fed tothe other inputs of the frequency mixers 37 and 138.

At this time, if the four signals inputted to the frequency mixers 137and 138 have the above-mentioned phase relation, the following signalsappear in the outputs of the frequency mixers 137 and 138, respectively.

That is, the following equations are obtained. $\begin{matrix}\begin{matrix}{{{2 \cdot \sin}\quad{\omega_{{CH\_ RF}{\_ GSM}} \cdot \sin}\quad\omega_{IF}} = {{- {\cos\left( {\omega_{{CH\_ RF}{\_ GSM}} + \omega_{IF}} \right)}} +}} \\{\cos\left( {\omega_{{CH\_ RF}{\_ GSM}} - \omega_{IF}} \right)} \\{{{{- 2} \cdot \sin}\quad{\omega_{{CH\_ RF}{\_ DCS}} \cdot \sin}\quad\omega_{IF}} = {{- {\cos\left( {\omega_{{CH\_ RF}{\_ DCS}} + \omega_{IF}} \right)}} -}} \\{\cos\left( {\omega_{{CH\_ RF}{\_ DCS}} - \omega_{IF}} \right)}\end{matrix} & (12) \\\begin{matrix}{{{2 \cdot \cos}\quad{\omega_{{CH\_ RF}{\_ GSM}} \cdot \cos}\quad\omega_{IF}} = {{- {\cos\left( {\omega_{{CH\_ RF}{\_ GSM}} + \omega_{IF}} \right)}} +}} \\{\cos\left( {\omega_{{CH\_ RF}{\_ GSM}} - \omega_{IF}} \right)} \\{{{2 \cdot \cos}\quad{\omega_{{CH\_ RF}{\_ DCS}} \cdot \cos}\quad\omega_{IF}} = {{- {\cos\left( {\omega_{{CH\_ RF}{\_ DCS}} + \omega_{IF}} \right)}} +}} \\{\cos\left( {\omega_{{CH\_ RF}{\_ DCS}} - \omega_{IF}} \right)}\end{matrix} & (13)\end{matrix}$

As can be understood from those equations, when the outputs from the twofrequency mixers 137 and 138 are added, only the following signal isextracted.cos(ω_(CH) _(—) _(RF) _(—) _(GSM)−ω_(IF))Orcos(ω_(CH) _(—) _(RF) _(—) _(DCS)−ω_(IF))   (14)In short, the following frequency is obtained.f_(CH) _(—) _(RF) _(—) _(GSM)−f_(IF)Orf_(CH) _(—) _(RF) _(—) _(DCS)+f_(IF)   (15)Here, f_(IF) is the output of the frequency divider 34, and thefrequency is 415 MHz.

The circuit composed of those poly-phase filters 131, 132 and thefrequency mixers 137, 138 can extract only one frequency of the twofrequencies generated when the frequencies are mixed. Thus, this isreferred to as an image rejection mixer.

When the equation (11) is substituted in the equation (15), thefollowing equations are obtained. $\begin{matrix}\begin{matrix}{{f_{{CH\_ RF}{\_ GSM}} - f_{IF}} = {{\left. \left( {1340 - 415} \right) \right.\sim\left( {1375 - 415} \right)}\quad{MHz}}} \\{= {{\left. 925 \right.\sim 960}\quad{MHz}}} \\{{f_{{CH\_ RF}{\_ DCS}} + f_{IF}} = {{\left. \left( {1390 + 415} \right) \right.\sim\left( {1465 + 415} \right)}\quad{MHz}}} \\{= {{\left. 1805 \right.\sim 1880}\quad{MHz}}}\end{matrix} & (16)\end{matrix}$Thus, the frequency equal to the reception frequency of the GSM/DCS canbe obtained.

The signal of this image rejection mixer is fed through the highfrequency amplifier 140 to the poly-phase filters 103, 113 in thequadrature demodulation units 12G and 12D. The direct quadraturedemodulation is carried out by the quadrature demodulation units 12G,12D composed of the frequency mixers 101, 102 and the frequency mixers111, 112 and the poly-phase filters 103 and 113.

Consequently, the frequency variable range of the VCO 41 is between 1295and 1465 MHz, and the frequency variable range of the VCO 42 is between2110 and 2170 MHz. Thus, they become a practical frequency variablerange as the VCO.

FIG. 11 shows the configuration example of the circuit, in which in themulti-band radio signal transmitter/receiver mentioned in theconventional technique, the circuit for converting a signal of afrequency different from a reception high frequency signal into adesirable local oscillation signal immediately before the quadraturemodulation unit is used for a local oscillation signal for a dual systemof GSM/DCS/UMTS, a triple band terminal.

Also, FIG. 12 shows the portion in which the circuit configuration ofthe section corresponding to FIG. 11 is extracted, in theabove-mentioned embodiment. In FIG. 11, the same symbols are assigned tothe corresponding sections, in order to easily understand thecorresponding relation to FIG. 12.

A frequency mixer unit used in FIG. 11 is configured so as to enable theremoval of an image frequency so that only a desirable frequency can begenerated. In the channel PLL circuit unit 40 and the frequencyswitching PLL circuit unit 30, the VCO circuits are necessary for theGSM, the DCS and the UMTS, respectively. Also, the image rejection mixerunits are necessary for the GSM, the DCS and the UMTS, respectively.Thus, it is understood that the circuit scale is expanded.

On the other hand, in the embodiment of the present invention, as shownin FIG. 12, the image rejection mixer unit 13 is jointly used in theGSM/DCS, and the frequency to be used in the offset PLL is changedbetween the time of the GSM/DCS and the time of the UMTS. Consequently,the VCO of the channel PLL circuit unit 40 can be divided to the twoVCOs such as the VCO 41 for the GSM/DCS and the VCO 42 for the UMTS. TheVCO properties required in the GSM/DCS and in the UMTS are differentdepending on the systems, and the frequency range to carry out thevoltage control of the VCO becomes narrow. Thus, the property becomeseasy. Also, the number of the VCOs themselves can be reduced. Hence, itcan be understood that the large reduction in the circuit scale.

By the way, in FIG. 4, the portion except the loop filter 44 of thechannel PLL circuit unit 40, the image rejection mixer unit 13, thequadrature demodulation units 12G, 12D and 12W and the variable gain lownoise amplifiers 11G, 11D and 11W can be made into an IC as one ICcircuit.

Also, similarly, the portion of the frequency switching PLL circuit unit30 other than the loop filter 33, the quadrature modulation/amplifyingunit 22, the quadrature modulation unit 24, and the portion of theoffset PLL circuit unit 23 other than the VCOs 161G, 161D and 161W, theloop filters 166G, 166D and 166W can be made into an IC as one ICcircuit.

Second Embodiment

FIG. 13 shows an embodiment of a multi-band radio signaltransmitter/receiver that uses a regeneration dividing circuit unit 90,instead of the image rejection mixer unit 13 in FIG. 4.

In the case of the embodiment in FIG. 13, differently from the case ofthe embodiment in FIG. 4, the oscillation frequencies f_(CH) _(—) _(RX)_(—) _(GSM) and f_(CH) _(—) _(RX) _(—) _(DCS) at the reception time ofthe DCS/GSM mode of the VCO 41 in the channel PLL circuit unit 40 arerepresented as follows.f _(CH) _(—) _(RF) _(—) _(GSM)=1387.5 to 1440 MHzf _(CH) _(—) _(RF) _(—) _(DCS)=1353.5 to 1410 MHzHowever, the frequency during the transmission is equal to the case ofthe embodiment in FIG. 4, and it is not changed.

Also, at the time of the UMTS, the oscillation frequency of the VCO 42is equal to the case of the embodiment in FIG. 4, and it is 2110 to 2170MHz. Consequently, the frequency variable range of the VCO 41 is between1295 and 1440 MHz, and the frequency variable range of the VCO 42 isbetween 2110 and 2170 MHz. Thus, they become the attainable frequencyrange as the VCO, respectively.

FIG. 14 shows the specific configuration example of the reproductiondivision circuit unit 90. That is, in this example, the reproductiondivision circuit unit 90 includes a frequency mixer 91, a low passfilter 92 and ½ dividers 93 and 94.

According to the multi-band radio signal transmitter/receiver having theconfiguration of the embodiment as mentioned above, the followingeffects can be obtained.

1. It is possible to attain the direct conversion transmitter/receiverthat does not involve the extreme increase in the circuit scale when theRF block for the transmission/reception is made into an IC.

2. The switching of the frequency of the offset PLL allows the number ofthe voltage control oscillators used at the transmission/reception timeto be 2 (two).

3. Due to the reason of the item 1, the extreme increase in the chiparea is not involved.

4. Due to the reason of the item 3, the extreme increase in the chipcost is not involved.

5. Due to the reason of the item 1, the extreme deterioration in thechip yield is not involved.

6. Due to the reason of the item 1, the extreme increase in the powerconsumption of the circuit is not involved.

7. Due to the reason of the item 2, the oscillation frequency range ofthe voltage control oscillator can be made narrower.

8. Due to the reason of the second item, the voltage control oscillatorcan be used for each system.

The above-mentioned embodiments are designed such that by switching theinput of the Gilbert cell mixer, the combined use is carried out such asthe quadrature modulation unit at the GSM/DCS mode and the amplifier atthe UMTS mode. However, it is naturally allowable to respectivelyinstall the quadrature modulation unit and the amplifier to therebyswitch between the GSM/DCS and UMTS modes.

As mentioned above, according to the present invention, it is possibleto provide the multi-band radio signal transmitter/receiver that canachieve the miniaturization and the power saving of the hardwarecircuit.

1-10. (canceled)
 11. A multi-band radio signal transmitter/receivercapable of carrying out a communication through a signal of a firstcommunication method of transmitting/receiving a signal modulated byusing information with regard only to a phase and through a signal of asecond communication method of transmitting/receiving a signal modulatedby using information with regard to a phase and an amplitude and canalso carry out a communication in a plurality of different frequencybands, comprising: first frequency signal generating means forgenerating a signal of a fixed frequency that is different between atime of said first communication method and a time of said secondcommunication method; second frequency signal generating means forgenerating a signal of a frequency corresponding to a communicationchannel to be used, with regard to a communication method and afrequency band that are selected from said first communication method,said second communication method and said plurality of frequency bands,wherein said signal is a transmitting/receiving reference oscillationsignal that is used to generate a local oscillation signal fordemodulating a reception signal based on said first communication methodor a reception signal based on said second communication method for eachcommunication method and is also used to generate a transmission signalbased on said first communication method or a transmission signal basedon said second communication method; first communication methodmodulating means for generating a modulation signal in which atransmitting baseband signal is modulated by using a signal of a fixedfrequency for said first communication method from said first frequencysignal generating means, as a modulating reference signal, when thetransmission signal of said first communication method is generated;amplifying means for amplifying a signal of a fixed frequency for saidsecond communication method from said first frequency signal generatingmeans, when the transmission signal of said second communication methodis generated; transmitting signal generating means for generating amodulating reference signal, which when generating the transmissionsignal of said first communication method, phase-compares saidmodulation signal from said first communication method modulating meanswith said transmitting/receiving reference oscillation signal from saidsecond frequency signal generating means, controls a variable frequencyoscillator based on its phase comparison output and thereby generates amodulation transmission signal, and when generating the transmissionsignal of said second communication method, phase-compares saidamplified signal of the fixed frequency for said second communicationmethod from said amplifying means with said transmitting/receivingreference oscillation signal from said second frequency signalgenerating means, and based on its phase comparison output, generates amodulation signal of said second communication method; and an imagerejection mixer unit which includes poly-phase filters as a function ofgenerating signals of phase orthogonal to each other.